Analysis of a Digital Logic Sequential Circuit

Introduction

This document details the analysis of a given sequential circuit. Sequential circuits are fundamental building blocks in digital systems, characterized by their dependence on both current inputs and past states. Understanding their behavior involves deriving excitation equations, state equations, and constructing state tables and state diagrams.

Circuit Description

The circuit to be analysed consists of:

• Two JK flip-flops (let's call them FF-A and FF-B).

• Various logic gates: 5 AND gates, 1 OR gate, and 1 NOT gate.

• An external input X.

• An output Y.

• All flip-flops are clocked synchronously (implied by the common clock input, though not explicitly drawn, it's standard for synchronous circuits).

Flip-Flop Excitation Equations

First, let's identify the inputs to each JK flip-flop. Let the outputs of first flip flop be A​ and A′​, and for FF-B be B​ and B′​ and the set and reset inputs to these flip flops be JA, KA, JB and KB respectively.

For Flip-Flop A:

• JA​: The set input of flip flop A​ is the output of an AND gate. One input to this AND gate is X'. The other input is B​. Therefore,
  
  JA ​= B ⋅ X'​

• KA​: The input to KA​ is the output of an AND gate. One input to this AND gate is X. The other input is B′​. Therefore,
  
  KA​ = B' ⋅ X​

For Flip-Flop B:

• JB​: The set input to flip flop B​ is the output of an OR gate. One input to this OR gate is the output of an AND gate (X⋅A'​). The other input to this OR gate is the output of another AND gate (X′⋅A​). Therefore, JB ​= (X⋅A'​)+(X′⋅A​) This expression for JB​ is equivalent to the XOR operation between X and A​. So,
  
  JB​ = A XOR X.

• KB​: The reset input to B​ is directly connected to JB. Therefore it is same as JB,
  
  KB​ = A XOR X

Output Equation

The external output Y is the output of an AND gate. Its inputs are B​ and X. Therefore,

Y = B ⋅ X
State Table

A state table summarizes the behavior of the sequential circuit by listing all possible present states, next states, inputs and outputs. There are 2 flip flops A and B and an input variable X. In total there are three variables. They have 2^3 = 8 possible different combinations. Let us list all of these combinations.

+-------+--------+

|Present|External|

|State  |Input   |

+--+----+--------+

| A|B   |    X   |

| 0|0   |    0   |

| 0|0   |    1   |

| 0|1   |    0   |

| 0|1   |    1   |

| 1|0   |    0   |

| 1|0   |    1   |

| 1|1   |    0   |

| 1|1   |    1   |

+--+----+--------+

Now for each of the combination evaluate flip flop inputs JA, KA, JB and KB.

JA = BX'; So JA is one whereever B = 1 and X = 0.

KA = B'X; So KA is one whereever B = 0 and X = 1.

The next state of A flip flop is evaluated using characteristics table of JK flip flop. That is

Next state of A is same as previous state for JA = 0  and KA = 0.

Next state of A = 1 for JA = 1 and KA =0.

Next state of A = 0 for JA = 0 and KA = 1.

Next state is NOT of previous state if both JA = 1 and KA = 1.

+-------+--------+-----------+-----+------+

|Present|External| Flip Flop |Next |Output|

|State  |Input   | Inputs    |State|      |  

+--+----+--------+-----------+-----+------+

| A|B   |    X   |JA KA JB KB| A|B |  Y   |

| 0|0   |    0   | 0 0       | 0|  |  0   |

| 0|0   |    1   | 0 1       | 0|  |  0   |

| 0|1   |    0   | 1 0       | 1|  |  0   |

| 0|1   |    1   | 0 0       | 0|  |  1   |

| 1|0   |    0   | 0 0       | 1|  |  0   |

| 1|0   |    1   | 0 1       | 0|  |  0   |

| 1|1   |    0   | 1 0       | 1|  |  0   |

| 1|1   |    1   | 0 0       | 1|  |  1   |

+--+----+--------+-----------+-----+------+

In next step we do the same for flip flop B.

The set input for flip flop B is JB =  A XOR X; So JB is 1 whenever A and X are different. Same goes for KB.

+-------+--------+-----------+-----+------+

|Present|External| Flip Flop |Next |Output|

|State  |Input   | Inputs    |State|      |  

+--+----+--------+-----------+-----+------+

| A|B   |    X   |JA KA JB KB| A|B |  Y   |

| 0|0   |    0   | 0 0   0 0 | 0|0 |  0   |

| 0|0   |    1   | 0 1   1 1 | 0|1 |  0   |

| 0|1   |    0   | 1 0   0 0 | 1|1 |  0   |

| 0|1   |    1   | 0 0   1 1 | 0|0 |  1   |

| 1|0   |    0   | 0 0   1 1 | 1|1 |  0   |

| 1|0   |    1   | 0 1   0 0 | 0|0 |  0   |

| 1|1   |    0   | 1 0   1 1 | 1|0 |  0   |

| 1|1   |    1   | 0 0   0 0 | 1|1 |  1   |

+--+----+--------+-----------+-----+------+

Similarly we have evaluated the output Y.  It is 1 whenever B = 1 and X = 1.

State Diagram

Once state table is complete, it can be used to draw the state diagram. State diagram is a graphical representation of the state table. Each state is represented by a circle, and transitions between states are represented by directed arcs. Each arc is labeled with "Input/Output".

(A graphical representation is difficult to draw in text, but the state diagram would have four states: 00, 01, 10, 11. Arrows would connect these states based on the state table, labeled with X/Y.)

For example:

• From state 00:

  • If X=0, go to state 01, output Y=0. (00) ---0/0--->​ (01)

  • If X=1, go to state 00, output Y=0. (00) ---1/0--->​ (00)

• From state 01:

  • If X=0, go to state 01, output Y=0. (01) ---0/0--->​ (01)

  • If X=1, go to state 10, output Y=1. (01) ---1/1--->​ (10)

• From state 10:

  • If X=0, go to state 00, output Y=0. (10) ---0/0--->​ (00)

  • If X=1, go to state 11, output Y=0. (10) ---1/0--->​ (11)

• From state 11:

  • If X=0, go to state 11, output Y=0. (11) ---0/0--->​ (11)

  • If X=1, go to state 01, output Y=1. (11) ---1/1--->​ (01)

Circuit Functionality

By observing the state table and state diagram, we can infer the circuit's function.

• When X=0:

  • If in 00, stays in 00.

  • If in 01, goes to 11.

  • If in 10, goes to 11.

  • If in 11, goes to 10. 

  • The output Y is always 0 when X=0.

• When X=1:

  • If in 00, goes to 01.

  • If in 01, goes to 00.

  • If in 10, goes to 00.

  • If in 11, stays in 11. 

  • The output Y is 1 only when X=1 AND state is either 01 or 11.

This circuit behaves as a synchronous sequential machine with a specific state transition logic dependent on the input X.