Title: Design and Simulation a Sequential Logic Circuit for a Given Problem

Objective:

In this lab we design a sequential logic circuit from the given problem specifications.

Lab Equipment and Components:

• 74LS74 Dual D-Flip Flop IC

• 74LS76 DUAL JK FLIP-FLOP IC

• AND Gate: 74LS08

• OR Gate: 74LS32

• NOT Gate: 74LS04

Introduction:

Procedure to design a sequential circuit follows the following general steps:

• The word description of the circuit behavior is stated. This may be accompanied by a

state diagram, a timing diagram, or other pertinent information.

• From the given information about the circuit, obtain the state table.

• The number of states may be reduced by state reduction methods if the sequential circuit

can be characterized by input-output relationships independent of the number of states.

•  Assign binary values to each state if the state table obtained in step 2 or 3 contains letter

symbols.

• Determine the number of flip-flops needed and assign a letter symbol to each.

• Choose the type of flip-flop to be used.

• From the state table, derive the circuit excitation and output tables.

• Using the map or any other simplification method, derive the circuit output functions and

the flip-flop input functions.

• Draw the logic diagram.

Lab Tasks:

• Design a sequential circuit with two D Flip-flops A and B, and one input X. When X = 0, the state of the circuit remains the same. When X = 1, the circuit goes through the state transitions from 00 to 01, to 11, to 10, back to 00, and repeats. Show all design steps and simulate in Mutisim Live.

Solution

Present Next D-FF Input

A B X | A B | DA DB

0 0 0 | 0 0 | 0  0

0 0 1 | 0 1 | 0  1

0 1 0 | 0 1 | 0  1 

0 1 1 | 1 1 | 1  1 

1 0 0 | 1 0 | 1  0

1 0 1 | 0 0 | 0  0

1 1 0 | 1 1 | 1  1

1 1 1 | 1 0 | 1  0

Flip-Flop input equations

DA = A X' + B X

DB = A' X + B X'

Logic Diagram

• Design a sequential circuit with two JK flip-flops A and B and two inputs E and F. If E = 0, the circuit remains in the same state regardless of the value of F. When E = 1 and F = 1, the circuit goes through the state transitions from 00 to 01, to 10, to 11, back to 00, and repeats. When E = 1 and F = 0, the circuit goes through the state transitions from 00 to 11, to 10, to 01, back to 00, and repeats. Show all design steps and simulate in Mutisim Live.

Solution

State Table

Pre Inp. Next  FF-A   FF-B

State    State Inp.   Inp.

AB | EF | AB | JAKA | JBKB

00 | 00 | 00 | 0X   | 0X

00 | 01 | 00 | 0X   | 0X

00 | 10 | 11 | 1X   | 1X

00 | 11 | 01 | 0X   | 1X

01 | 00 | 01 | 0X   | X0

01 | 01 | 01 | 0X   | X0

01 | 10 | 10 | 1X   | X1

01 | 11 | 10 | 1X   | X1

10 | 00 | 10 | X0   | 0X

10 | 01 | 10 | X0   | 0X

10 | 10 | 01 | X1   | 1X

10 | 11 | 11 | X0   | 1X

11 | 00 | 11 | X0   | X0

11 | 01 | 11 | X0   | X0

11 | 10 | 10 | X0   | X1

11 | 11 | 00 | X1   | X1

Critical Analysis/Conclusion

Rubrics:

Circuit and Logic Diagram (3 points)

Simulation, Implementation and Working (3 points):

Experimental Results (3 points)

Critical Analysis and Conclusion (3 points)

Viva (3 points)